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Simulation of cryptographic algorithms using FPGA
Németh, František ; Mašek, Jan (referee) ; Smékal, David (advisor)
Bachelor thesis is dealing with a cipher standard AES and with a design of encryption and decryption components for AES in special modes of operation. Programming language is VHDL. In theoretical part of thesis is a further descriptions of AES and behaviour of block cipher operation modes. Furthermore the brief description of VHDL, FPGA and NetCOPE framework is a piece of theoretical part as well. The practical part contains designs which are made in developing environment Vivado from Xilinx. Programmed modes of operation are ECB, CBC, CTR and CFB. Simulation outputs and synthesis results are summerized in tables.
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The issue of VFR flights at high altitudes
Vrána, Jiří ; Chlebek, Jiří (referee) ; Hammer, Jaromír (advisor)
This bachelor thesis deals with procedures of VFR flight at high altitudes. It describes the division of airspace including the limitations applied and significant international organizations in relation to its management and organization. It also focuses on the rules for the execution of VFR flights, non-standard flights, and comparison of non-standard flights with adjacent states.
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Implementation of Encryption Algorithms in VHDL Language
Fruněk, Lukáš ; Fukač, Tomáš (referee) ; Kořenek, Jan (advisor)
The thesis deals with the design and implementation of the encryption algorithms DES and AES, operating in the CTR mode. The designed modules are implemented in the VHDL language and are mapped in the FPGA Intel Arria 10 SX 480. Algorithms are optimized for maximum throughput using loop unrolling and inner pipelining. The encryption module for DES reaches throughput of 26.2 Gbit/s with the circuit operating 410 MHz, and the module for AES reaches throughput of 34.6 Gbit/s with the circuit operating at 271 MHz. The reached throughput is in the order of thousand times faster than of the same encryption algorithms implemented in software for built-in microprocessors.
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Model e-advertising Segment of the Selected e-commerce
Smrž, Marek ; Kovář, Libor (referee) ; Dvořák, Jiří (advisor)
Master’s thesis describes plus evaluates small firm that the deal with production plus sale ceramic performances. Work is divided on several part, in which survey especially on analysis e - commerce that the firm employs plus on his inadequacies, largely in the area e- advertising. Feature plus scope of employment is suggest mock - up e- advertising, that shall in connection with his costs viable.
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Robotic Neurosurgery Planning Tool
Sadleková, Simona ; Olivová, Jana (referee) ; Kadlec, Petr (advisor)
Táto diplomová práca sa zaoberá problematikou plánovania robotických operácií pre neurochirurgiu a optimalizačnými algoritmami používanými na návrh operačných zákrokov nimi prevádzaných, predovšetkým algoritmom VNDMOPSO. V úvodnej kapitole je vysvetlený základný princíp prevádzania robotických operácií a popísaný koncentrický trubicový robot používaný pre tento účel. Ďalej sa práca zaoberá všeobecným popisom optimalizačných problémov a algoritmov ich riešiacich a následne je podrobne popisovaný algoritmus VNDMOPSO, vybraný pre daný optimalizačný problém. Pre tento algoritmus je vytvorená v prostredí MATLAB funkcia, ktorá je následne testovaná na viacerých testovacích úlohách. V nasledujúcich častiach je overovaná jej funkčnosť na reálnych tvaroch nádorov a je predstavené grafické užívateľské prostredie, ktoré slúži ako nástroj pre plánovanie neurochirurgických robotických operácií. V záverečnej časti práce je vyhodnotený vplyv nastavenia jednotlivých parametrov algoritmu na výsledky optimalizácie.
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Implementation of Encryption Algorithms in VHDL Language
Fruněk, Lukáš ; Fukač, Tomáš (referee) ; Kořenek, Jan (advisor)
The thesis deals with the design and implementation of the encryption algorithms DES and AES, operating in the CTR mode. The designed modules are implemented in the VHDL language and are mapped in the FPGA Intel Arria 10 SX 480. Algorithms are optimized for maximum throughput using loop unrolling and inner pipelining. The encryption module for DES reaches throughput of 26.2 Gbit/s with the circuit operating 410 MHz, and the module for AES reaches throughput of 34.6 Gbit/s with the circuit operating at 271 MHz. The reached throughput is in the order of thousand times faster than of the same encryption algorithms implemented in software for built-in microprocessors.
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Comparison of the effectiveness of online advertising channels demonstrated on an example of printed cookbook sale
Novák, Petr ; Máchová, Eva (advisor) ; Shavit, Anna (referee)
This bachelor thesis deals with a comparison of the effectiveness of advertising tools available online. The theoretical part addresses characteristic features of the work of the advertising channels studied and presents the Google Analytics traffic measurement tool, along with those functions that allow a deeper understanding of the equivalence of different sources of traffic on the conversions performed. The practical part compares paid advertising channels - Sklik, Google Adwords and Facebook ads - with the organic search results. The thesis explores user behaviour on websites, with an emphasis on the effectiveness of the campaign as expressed by conversion indicators. Using segmentation, the results obtained are compared in terms of age group, location, gender or the type of device used. In the final evaluation, the author places the results of the research into an overal context, emphasising the interplay between different marketing activities and analysing the influences which play a role in the effectiveness evaluated.
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Simulation of cryptographic algorithms using FPGA
Németh, František ; Mašek, Jan (referee) ; Smékal, David (advisor)
Bachelor thesis is dealing with a cipher standard AES and with a design of encryption and decryption components for AES in special modes of operation. Programming language is VHDL. In theoretical part of thesis is a further descriptions of AES and behaviour of block cipher operation modes. Furthermore the brief description of VHDL, FPGA and NetCOPE framework is a piece of theoretical part as well. The practical part contains designs which are made in developing environment Vivado from Xilinx. Programmed modes of operation are ECB, CBC, CTR and CFB. Simulation outputs and synthesis results are summerized in tables.
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The issue of VFR flights at high altitudes
Vrána, Jiří ; Chlebek, Jiří (referee) ; Hammer, Jaromír (advisor)
This bachelor thesis deals with procedures of VFR flight at high altitudes. It describes the division of airspace including the limitations applied and significant international organizations in relation to its management and organization. It also focuses on the rules for the execution of VFR flights, non-standard flights, and comparison of non-standard flights with adjacent states.
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